1. Field of the Invention
The present invention relates to memory management of shared memory in a multiprocessor computing system. More particularly, the present invention relates to a software mechanism for memory address translations from virtual addresses to local physical addresses or remote physical addresses in the multiprocessor computing system.
2. Description of Related Art
In conventional multiprocessor computing systems, application and system software access memory through the use of virtual addresses. The computing system maintains a page table which maps a given virtual address to a corresponding physical address (i.e., the location of where the data actually resides in memory). Data can generally be accessed from either a local memory or a remote memory, depending on the physical location of the data in the memory of the computing system.
Nodes in the multiprocessor system consist of multiple central processing units (CPUs) and memory, and are connected to the other nodes in the system through a system bus or network. The system bus is used to transfer address and data information from one node in the multiprocessor computing system to another node. In this manner, the memories associated with any single node can be accessed, shared, and utilized by other nodes in the system.
However, there are performance drawbacks in accessing memory "remotely", wherein a node reads or writes data stored in the memory of another node in the multiprocessor computing machine. In particular, an access to memory maintained remotely within another node is substantially slower than an access to the memory contained locally in the node. Computing systems and machines with such non-uniform memory access characteristics are referred to as NUMA systems.
In order to improve the performance associated with remote memory accesses, an attraction memory, such as a memory cache, can be maintained as local memory in each node. The attraction memory can store "replicas" of pages of memory which are remotely accessed by the node containing the attraction memory. A hardware device which allows the use of local memory pages as an attraction memory is described in the above referenced related applications, "A Hybrid NUMA Coma Caching System And Methods For Selecting Between The Caching Modes" by Hagersten et al., filed Dec. 22, 1995, Ser. No. 08/577,283; and "A Hybrid NUMA Coma Caching System And Methods For Selecting Between The Caching Modes" by Wood et al., filed Dec. 22, 1995, Ser. No. 08/575,787. This device automatically ensures the coherency between the contents of the remote memory and the local attraction memory.
However, conventional page tables in multiprocessor computing systems do not generally map virtual addresses to the local memory pages of an attraction memory for data which has been replicated locally at a given node. Without such mapping, the performance benefits offered by such a hardware "replicating" device cannot be fully realized by the multiprocessor computing system
However, modification of the system's page table to remap the virtual to physical addresses is undesirable, as this would entail substantial changes to the system's operating system
What is needed is a mechanism to establish and permit efficient remote memory accesses which will operate within a multiprocessor computing machine without modification of the application software and without modification of the operating system's conventional page table structure